发明名称 MULTI-PROCESSOR SYSTEM
摘要 PURPOSE:To improve overall performance of a multi-processor system by starting the time count at a time point when an access is started to a memory and then the memory access is stopped after a prescribed time needed for memory access elapsed even though the access processing given from a processor is not finished. CONSTITUTION:A chip selection stop means 10 is provided to each processor to stop the memory access carried out by a chip selection signal after a set time passed from generation of said chip selection signal after setting the time needed for memory access after each processor produces a chip selection signal and supplies it to a memory. Therefore the output chip selection signal is released after the time needed for memory access even in such a case where the processor that carried out the memory access qualifies an address and produces an idle state. Hereafter other processors can freely have memory accesses and therefore the overall system performance is improved.
申请公布号 JPS63113751(A) 申请公布日期 1988.05.18
申请号 JP19860258401 申请日期 1986.10.31
申请人 YASKAWA ELECTRIC MFG CO LTD 发明人 HARA KENJI
分类号 G06F15/16;G06F12/00;G06F15/167;G06F15/177 主分类号 G06F15/16
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