| 摘要 |
PURPOSE:To simplify the structure of a test facilitating circuit for a semiconductor device by adding a zero detecting circuit, a changeover switch and the flip-flop of a single stage. CONSTITUTION:A pseudo random number generating circuit contains flip-flops FF1, exclusive OR circuits 2, and a control circuit 3 which controls the presence/ absence of the input to be applied to the circuit 2 together with a zero detecting circuit 7, a selector circuit 8 and the FFn of a single stage. Thus a circuit is formed to produce pseudo random numbers including an all-zero state and furthermore to produce the pseudo random numbers having 2<n> types of value. As a result, since the pseudo random numbers are produced within an n-bit shift register (FF), they can be transmitted as they are with a fixed time delay when another shift register is connected in series to the n-bit shift register. |
