发明名称 ELECTRONIC COMPUTER CONTAINING ABBREVIATED INSTRUCTION
摘要 PURPOSE:To increase the operand processing speed by discriminating the number of operands of an instruction to recognize the next instruction when no operand is detected and recognizing an operand designator with a single operand and recognizing the information words with the detection of two operands respectively. CONSTITUTION:The microinstructions 13a, 14a and 15a are read out of a mu-ROM 12 in response to the operation codes of instructions and the following information word is recognized as the next instruction when the absence of operand is confirmed. Then the following information word is recognized as an operand designator when a single operand is identified. Furthermore 1st and 2nd operand identifying information are recognized if the following information word can identify two operands at a time after two operands are identified. When both operand identifying information are not identified at a time, it is decided whether the 2nd operand must be identified or not after the 1st operand is identified. If not, an optional prescribed one of general-purpose register groups 15 is defined as the 2nd operand.
申请公布号 JPS63111536(A) 申请公布日期 1988.05.16
申请号 JP19860255710 申请日期 1986.10.29
申请人 HITACHI LTD 发明人 KIDA HIROYUKI;MAEJIMA HIDEO
分类号 G06F9/32;G06F9/22 主分类号 G06F9/32
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