发明名称 INSTRUCTION SIMULATING SYSTEM BY MICROPROCESSOR
摘要 PURPOSE:To realize the change of the execution processing with an instruction simulation system by defining each bit of a rewritable work register in response to an executing routine, testing the corresponding bit in an instruction executing mode to change the executing routine and selecting the execution of prepared instruction groups. CONSTITUTION:The bits in a memory storing a program are allocated in response to instructions excluding a basic one and a work register consisting of plural bits that can be rewritten by instructions is provided on the executing part 6 of a processor 2. Then each bit is defined so that it corresponds to each executing routine in a control memory 5. Then a microprogram tests a bit 5, for example, to obtain the sum total of D1-D4 by executing its own microinstruction train when the bit 5 is equal to 0. Then the bit 5 is designated to 1 to obtain the value obtained by multiplying the sum total of D1-D4 by D5 via a soft instruction prepared in the memory 1.
申请公布号 JPS63111532(A) 申请公布日期 1988.05.16
申请号 JP19860255733 申请日期 1986.10.29
申请人 NEC CORP 发明人 FURUYA TSUKASA
分类号 G06F9/22;G06F9/26 主分类号 G06F9/22
代理机构 代理人
主权项
地址