发明名称 DELAY PULSE GENERATING CIRCUIT
摘要 PURPOSE:To easily control the phase difference by using plural delay pulse generating basic circuits containing a delay element that can optionally select the delay value of an input reference pulse respectively and selecting those basic circuits via an address generating circuit. CONSTITUTION:An input reference pulse 1 is supplied to the delay pulse generating basic circuits 10i (i = 0-n) via a drive circuit 2. The circuit 10i contains a delay element 4, a selection circuit 5 and a selection signal generating circuit 8 and selects 5 one of delay outputs 4-1 of the element 4 via a selection signal 7 to output it. An address is designated by clock signals 14 and 15 through an address generating circuit 13. Then an address clock is selected 11 and supplied to the circuit 10i. The circuit 8 receives a clock signal 9 and selects 6 the delay value to output a pulse delayed by the desired value. Thus, it is possible to easily control the phase difference between a reference pulse and a delay pulse.
申请公布号 JPS6387016(A) 申请公布日期 1988.04.18
申请号 JP19860232576 申请日期 1986.09.30
申请人 NEC CORP 发明人 ISHIKAWA KENJI
分类号 H03K5/13;H03K5/131 主分类号 H03K5/13
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