Semiconductor memory circuit having a fast read amplifier tristate bus driver.

摘要

The invention relates to a C-MOS semiconductor memory circuit having a read amplifier and a tristate bus driver. The read amplifier is a two stage amplifier. The bit lines in the memory are connected via P-MOS pull-up transistors to the supply voltage. The logic low level is 1 Volt below the supply voltage. In order to bring the input signals for the difference amplifier at a most sensitive and fast level, a d.c.-shifting amplifier of the "emitter follower" type is connected between each input thereof and the associated bit line. Bot the difference amplifier and the two follower amplifiers are activated only for a short period of time by means of a selection signal which gives a strong restriction in the power dissipation. The tristate driver comprises a push-pull output stage and an inverting AND gate which is controlled by the output of a difference amplifier and by an equalisation signal which is also applied to the difference amplifier and therefore is simple of design and gives only a low signal delay.