| 摘要 |
PURPOSE:To reduce VCC (sat) without increasing a leakage current due to a crystal defect by removing a buried layer directly under an emitter region of an NPN transistor when a vertical PNP transistor and the NPN transistor are formed by 2-stage epitaxial layers. CONSTITUTION:Upper and lower separating regions 25 introduced into a substrate 21 are formed in the substrate 21 to divide the substrate 21 into first and second insular regions 26, 27, a vertical PNP transistor is formed on the region 26, and an NPN transistor is formed on the region 26 to form an IC. With this configuration a first epitaxial layer 22, a second epitaxial layer 23 and a buried layer are formed on the respective insular regions, an active region is formed on the second epitaxial layer of upper stage. At this time, the high concentration buried layer of the NPN transistor is formed of a first buried layer 24 provided on the substrate 21 and a second buried layer 38 buried on the layer 22, and either the layers 24 or 38 directly under an emitter region 34 is cut out at this part. |
