发明名称 |
MEMORY SECURITY CIRCUIT |
摘要 |
A control circuit to disable the operation of a semiconductor microprocessor memory device in event of an unauthorized attempt to access the memory. The memory device is disabled from operation upon removal of the device from the microprocessor. A delayed signal generated outside the memory device enables the control circuit to generate a memory enabling signal. Logic circuit means including a counter generates a signal for a preselected time period during which the delayed signal is required to be generated. Both signals control the enabling of the memory device. |
申请公布号 |
DE3176673(D1) |
申请公布日期 |
1988.04.07 |
申请号 |
DE19813176673 |
申请日期 |
1981.07.16 |
申请人 |
NCR CORPORATION |
发明人 |
DEVCHOUDHURY, RATHINDRA, NATH |
分类号 |
G06F9/22;G06F12/14;G11C29/00;G11C29/12;(IPC1-7):G06F12/14 |
主分类号 |
G06F9/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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