| 摘要 |
PURPOSE:To simplify control carried out by software for shared memory access by producing an address to give access to a shared memory from control information received via a FIFO buffer via hardware. CONSTITUTION:When data information is transferred to a 2nd CPU 12 from a 1st CPU 11, the CPU 12 knows that the CPU 11 has written the data informa tion in a shared memory 13 from the control information on a FIFO buffer 15 via an informing means 25. Thus access is possible to the data information on the memory 13 via an increment means 22, a memory means 20, an identifica tion means 8 and an output means 24 for control information respectively. The CPU 11 transferring the data information knows that the CPU 12 has given an access to the memory 13 via a FIFO buffer 7 and an informing means 26 and controls an idle area of the memory 13. |
