发明名称 SELECTOR FOR QPSK REFERENCE PHASE
摘要 PURPOSE:To select a reference phase automatically and regenerate correct data by discriminating on whether synchronism detection is carried out in normal reference phase by a detecting circuit for a frame synchronizing signal or error detecting circuit for data by parity, and controlling the phase switching of the output of a 1/4 frequency dividing circuit or switching of data on the basis of the discriminated result. CONSTITUTION:A QPSK modulating signal S is applied from an input terminal 1 to multipliers 2 and 3 and a 4-multiplying circuit 10. The 4-multiplying circuit 10 obtains a four-fold carrier frequency signal P, which is supplied to a 1/4 frequency dividing circuit 11, whose outputs (a), (b), (c), and (d) are applied to a switching circuit 12; and (a,b), (b,c), (c,d), and (d,a) are selected as signals outputted to outputs (e) and (f) according to four states (0,0), (0,1), (1,0), and (1,1) of switching control signals A and B. Digital signals I and Q regenerated by a signal selected by the switching circuit 12 are normal data, and when a normal frame synchronizing signal pattern is regenerated, and output of a frame synchronizing signal detecting circuit 14 is applied to a control circuit 15. Consequently, a control circuit 15 detects frame synchronizing signals more than a half as many as a normal value within a specific time, and the control signals A and B are fixed.
申请公布号 JPS59186453(A) 申请公布日期 1984.10.23
申请号 JP19830060706 申请日期 1983.04.08
申请人 HITACHI SEISAKUSHO KK 发明人 SHIBUYA TOSHIFUMI;AMADA NOBUTAKA;HORIKOSHI TATSUO
分类号 H04L27/18;H04L27/227 主分类号 H04L27/18
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