发明名称 SIGNAL INTERMISSION DETECTION CIRCUIT
摘要 PURPOSE:To detect signal intermission stably for various distirbances by comparing an output signal of a positive peak detection circuit with an output signal of a negative peak detection circuit to detect the presence of signal intermission. CONSTITUTION:A timing signal (a) is received from an input terminal 1 and converted into a dual signal by a single/dual conversion circuit 2. Differential output signals b, c of duplicated 2-signal system are shifted to have a prescribed level difference by a level shift circuit 3 and a comparator circuit 4 compares the in-phase signals d, e from the circuit 3. The maximum DC level of the output waveform is detected by a positive peak detection circuit 5 from a signal (f) in output signals f, g via the circuit 4 and the minimum DC level is detected by a negative peak detection circuit 6 from the signal (g). Output signals h, i of the circuits 5, 6 are compared by a comparator circuit 7 to detect the signal intermission. Thus, the signal intermission is detected stably for various disturbances.
申请公布号 JPS6370646(A) 申请公布日期 1988.03.30
申请号 JP19860215431 申请日期 1986.09.12
申请人 MITSUBISHI ELECTRIC CORP 发明人 KON KEISUKE
分类号 H04B10/07;H04B17/00;H04L25/02 主分类号 H04B10/07
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