| 摘要 |
PURPOSE:To use a timing signal interconnection layer as other interconnections in an integrated circuit which does not need a timing signal by connecting the interconnection layer through a logic signal interconnection layer to the terminal of a logic integrated circuit. CONSTITUTION:A conductor layer 21 is an electrode layer for interconnecting the internal conductor 13 of a ceramic substrate to multilayer interconnections. Conductor layers 22, 23 are logic signal interconnections, and a conductor layer 24 is a ground layer for shielding noise signals generated in the layers 22, 23. A conductor layer 25 is a timing signal layer having timing signal interconnections commonly used for many multilayer interconnection substrate. Further, a conductor layer 26 is a surface layer having electrodes for attaching a logic integrated circuit 41. The leads 51 of the circuit 41 are not connected to the timing signal interconnections 64 but used for a general logic signal. |
