发明名称 TEST CIRCUIT
摘要 PURPOSE:To miniaturize a circuit scale by using a register to operate as a serial shift register in a usual action condition as a test mode register in a test condition. CONSTITUTION:When a test signal TEST is '0', namely, in a usual action condition, an octal counter 2 counts a serial clock SCK, counts eight rounds, and each time the transferring of 1 byte serial data is completed, an internal interrupting signal INTS is generated. Simultaneously, a flip-flop 5 is reset and the succeeding SCK input is neglected. When the test signal TESt is '1' and SCK, SI are '0', the output of the flip-flop 4 comes to be '1', and an internal circuit is set to a test condition. The internal circuit is set to a test mode in accordance with the value of a serial shift register.
申请公布号 JPS6356741(A) 申请公布日期 1988.03.11
申请号 JP19860203008 申请日期 1986.08.28
申请人 NEC CORP 发明人 NAKAMURA MASAHIRO
分类号 G06F11/22;G06F15/78 主分类号 G06F11/22
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