发明名称 SIGNAL SELECTING DEVICE
摘要 <p>PURPOSE:To make it unnecessary to do something to a connecting means, even when the number of signal sources must be increased some other day, by providing a signal input disconnection detecting circuit by the number of common buses, on a selecting circuit. CONSTITUTION:As for connecting lines 3 for connecting each signal source 1, 2,-(n), and a selecting circuit 4 consisting of a deciding circuit 4A and a selector 4B, they are connected through a prescribed number (for instance, 2 pieces) of common buses B1, B2 by which each signal source 1, 2,-(n) can used in common. Therefore, when an abnormality is detected in an input clock, output stop means 10, 20-N0 having a function for stopping an output to the common buses B1, B2 of an extracted clock signal are provided on the inside of each signal source 1, 2,-(n). Also, on the pre-stage of the deciding circuit 4A of the selecting circuit 4, input disconnection detecting circuits 41, 42 for detecting the disconnection of an input signal from the common buses B1, B2 are provided.</p>
申请公布号 JPS6350131(A) 申请公布日期 1988.03.03
申请号 JP19860193435 申请日期 1986.08.19
申请人 FUJITSU LTD 发明人 MORIYAMA YUTAKA;ISHIDA JUNICHI
分类号 H04L7/00;H04Q11/04 主分类号 H04L7/00
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