发明名称 PHASE LOCKED LOOP
摘要 PURPOSE:To avoid such e case where a phase locked loop PLL is set under a pull-in unable state by limiting the dynamic range of the voltage supplied to a voltage controlled oscillator VCO. CONSTITUTION:A voltage dividing circuit consisting of resistors 6 and 7 is set between a charge pump 3 and a VCO4 to limit the dynamic range of the voltage v(t). In such a device, the dynamic range of the v(t) is shown by a 1-dot chain line, for example, in response to a request of the VCO4 in case the dynamic range of the original v(t) is shown by a 2-dot chain line together with the waveform of the v(t) vibrating as shown by a curve (a). Under such conditions, the waveform of the v(t) is shown by a curve (b). As a result, the conditions of vibrations are lost and the PLL can be pulled in.
申请公布号 JPS6338328(A) 申请公布日期 1988.02.18
申请号 JP19860182343 申请日期 1986.08.02
申请人 SONY CORP 发明人 MORIYA RYUSUKE
分类号 H03L7/093;H03L7/08 主分类号 H03L7/093
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