| 摘要 |
PURPOSE:To obtain an integrated circuit device which facilitates a scan test including a circuit block having an asynchronous order circuit internally by connecting latch circuits to output terminals of scan registers provided between circuit blocks and at their connection parts. CONSTITUTION:The scan registers 8-16 are provided between combinational circuit blocks 35 and 37 and the asynchronous circuit block 36 including the order circuit and at their connection parts, and the latch circuits 17-25 are connected to the output terminals of the scan registers 8-16. Then, the input terminals and output terminals of the corresponding circuit blocks 35-37 are connected in normal operation by the latch circuits 17-25. In test operation, output data of the scan registers 8-16 are transmitted to the input terminals of the circuit blocks 35-37 which select and hold them by the selecting functions of the latch circuits 17-25 and in a scan mode, test data applied last are applied to the corresponding blocks continuously by the latch circuits 17-25. |
