| 摘要 |
PURPOSE:To obtain an integrated circuit device which facilitates a scan test including a circuit block having an asynchronous order circuit internally by providing latch circuits connected to scan registers and data selecting circuits which select either the output of a corresponding circuit block or the output of a latch circuit. CONSTITUTION:The scan registers 8-16 are provided between combinational circuit blocks 35 and 37 and an asynchronous circuit block 36 including an order circuit and their connection parts, and output terminals Q of the registers 8-16 are connected to data input terminals D of latch circuits 17-25. Further, the data selecting circuits 26-34 are connected to circuit blocks 35-37 are circuits 17-25. Then, the circuits 26-34 connect input terminals and output terminals of the respective circuit blocks 35-37 in normal operation, connect the output terminals of the circuits 17-25 to the input terminals of corresponding circuit blocks 35-37 in test operation, and holds test data applied last to the circuits 17-25 connected to the registers and also supplies it to the corresponding circuit blocks 35-37 continuously in a scan mode. |
