发明名称 PHASE LOCKED LOOP OSCILLATION CIRCUIT
摘要 PURPOSE:To stabilize action by providing a pulse missing detecting circuit, removing an unnecessary phase error signal due to the pulse missing of an input clock signal, loading the mask to a phase error signal in the synchronizing condition and removing the unnecessary phase error signal accompanying jitter and noise in an input signal. CONSTITUTION:When a pulse missing occurs at an input clock signal, the position is detected by a pulse missing detecting circuit, at this time, a mask is loaded to the unnecessary phase error signal to occur at the time of outputting a phase comparator 3 and the propagation to a charging pump 4 of the above- mentioned signal is prevented. The phase difference of an input output clock signal is supervised, the phase difference comes to be a constant value or below then, the mask is loaded to the output of the phase comparator 3 by a gate signal generating circuit 10. At such time, the mask is loaded so that the phase error signal can be transferred to the charging pump with the width necessary to keep the synchronizing condition only at the position where the phase error signal occurs at the output of the phase comparator 3. When the above- mentioned phase difference comes to be a constant value or above, it is detected by the circuit 9 and the mask by the circuit 10 is release.
申请公布号 JPS6333029(A) 申请公布日期 1988.02.12
申请号 JP19860076355 申请日期 1986.04.02
申请人 MITSUBISHI ELECTRIC CORP 发明人 MAKINO SHINYA
分类号 H04L7/033;H03L7/14;H04L7/02 主分类号 H04L7/033
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