| 摘要 |
PURPOSE:To speed up the information collection of a storage element in a logical device by providing an address register and a read register which operate with a nonstop clock in the logical device. CONSTITUTION:When the contents of the storage element 4 are read out at the time of trouble occurrence, a diagnosis controller 3 supplies a switching signal to a switching part 22 through a switching signal line 203 and also supplies address data to a register 20 through an address setting bus 200 in synchronism with a clock signal. Then when trouble occurs, a storage element information read part 2 is supplied with the clock signal continuously without any break and the register 20 latches address data supplied from the device 3 one after another and supplies them to the element 4 through the switching part 22. The element 4 supplies data corresponding to the supplied address data to a register 21 through a signal line 208 and the register 21 latches and supplies them to the device 3 through a signal line 208. Consequntly, the information of the element 4 in the logical device 1 is gathered at a high speed. |
