| 摘要 |
PURPOSE:To obtain constant logical threshold voltage at all times by inserting an Nch type field-effect transistor, in which a gate and a drain are connected, on the + power supply side of a CMOS inverter and a Pch type field-effect transistor, in which a gate and a drain are connected, on the-power supply side. CONSTITUTION:A source in a Pch type field-effect transistor 4 in which a gate and a drain are grounded is connected on the source side of an Nch type field- effect transistor 3, and a source in an Nch type field-effect transistor in which a gate and a drain are connected to a power supply is connected on the source side of a Pch type field-effect transistor 2. The voltage of a point (a) is made lower than the voltage of a + power supply 7 only by the threshold voltage VTN1 of the Nch type field-effect transistor 1 by the transistor 1 at that time. The voltage of a point (b) is made higher than the voltage of a-power supply 8 only by the threshold voltage VTP4 section of the Pch type field-effect transistor 4 by the transistor 4. Accordingly, logical threshold voltage is kept constant. |
