发明名称 ARRAY PROCESSOR
摘要 PURPOSE:To attain selection of a parallel processing constitution and a pipeline processing constitution by connecting the processor groups of the following stages in series or in parallel to the processor groups of the preceding processor groups via the bus changeover means. CONSTITUTION:The processor groups 3-6 contain unit processors 10-13, 14-17, 18-21 and 22-25 respectively. These unit processors are connected to individual input buses 31, 41, 51 and 61 and individual output buses 32, 42, 52 and 62. The bus 31 is connected to an input system bus 1; while the bus 62 is connected to an output system bus 2. The bus changeover switches 7-9 are provided among processor groups 3-6. The switch is controlled by a host computer among those switches 7-9. Then these groups 3-6 are connected in series or parallel with switching.
申请公布号 JPS636656(A) 申请公布日期 1988.01.12
申请号 JP19860149438 申请日期 1986.06.27
申请人 NEC CORP 发明人 TAMIYA ICHIRO
分类号 G06F15/16;G06F15/177;G06F15/80 主分类号 G06F15/16
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