FREMGANGSMAADE OG APPARAT TIL OVERFOERING AF DATA MELLEM TO DATABEHANDLINGSANLAEG, SOM DRIVES AF HVERT SIT UAFHAENGIGE KLOKSIGNAL

摘要

For the transmission of data words between a transmitting and a receiving installation, which installations are driven by a first CL1 and a second CL2 clock signal respectively, which data words are transmitted from a send register REG1 to a receive register REG2, a state signal WR1 is provided, which can have two alternative fixed sizes and which is forced from the sender side to the receiver side, after which the state of the signal is changed from the sender side. The state signal is processed logically in order to be able to register the commencement of the writing signal WR2 which brings about the writing in the receive register REG2 and the writing signal is cut off using the clock signal CL2 of the receiver side. <IMAGE>