| 摘要 |
A pipelined digital to analog converter is disclosed which utilizes a series of three capacitor and switch sections to convert a three bit segment of a digital word into an analog voltage. For a ten bit digital word, three 3-capacitor sections would be required with an additional capacitor section. The voltage across the output, or last, capacitor is the analog voltage in direct relation to the input digital word. Each of the three capacitor sections works in relation to switched transistors to charge and discharge in a predetermined fashion said capacitors, in relation to the binary level of each of the three digits in the input digital word. The circuit operates from the least significant bit to the most significant bit, and converts the input digital word to an output analog voltage.
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