| 摘要 |
<p>An improved performance MESFET device incorporating a structure fabricated utilizing self-aligned gate process technology. The edges of the gate electrode (28) formed are separated from the edges (23, 25) of the dopant regions (26, 27) implanted in the device substrate (23) by a distance which optimizes device performance. In order to increase process yield, a layer of dielectric material (29) is deposited on the substrate surface and then annealed to protect the gate electrode and both stabilize and planarize the substrate surface.</p> |
