发明名称 DIAL PULSE RECEIVING CIRCUIT
摘要 PURPOSE:To reduce the quantity of hardware by providing a limiter circuit which performs Schmitt trigger operation to the output of an integrating circuit based on an upper-limit clamp value and a lowerlimit clamp value to generate a rectangular wave and a counting circuit which counts output pulses of the limiter circuit. CONSTITUTION:When a dial pulse signal is inputted, the integrating circuit 3 performs integration based upon the make duration of the dial pulse signal as a positive value and the break duration as a negative value and clips the upper limit and lower limit of the integrated value to certain values respectively to output the signal. The limiter circuit 4 which inputs the output performs the Schmitt trigger operation by using the upper-limit clamp value and lower- limit clamp value clamped by the integrating circuit 3. Then, a counting circuit 5 counts output pulses of the limiter circuit 4 and outputs the counting result to an output terminal 2. Consequently, a dial pulse receiving circuit which consists of a small quantity of hardware is obtained.
申请公布号 JPS62284595(A) 申请公布日期 1987.12.10
申请号 JP19860128441 申请日期 1986.06.02
申请人 NEC CORP 发明人 ISHIZU WATARU
分类号 H03K5/1252;H03K5/00;H04Q1/32 主分类号 H03K5/1252
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