| 摘要 |
PURPOSE:To realize higher integration while preventing the S/N from degrading by a method wherein the plates of capacitor sections are connected with each other inside a silicon substrate and the storage capacitor sections and switching element sections are both made three-dimensional. CONSTITUTION:A semiconductor memory of this design is constituted of a charge-storing capacitor 1 and switching MOS transistor 2, and the drain of the MOS transistor 2 is connected to a bit line 3 and the gate thereof to a word line 4. The capacitors 1 are so formed as to surround an Si layer at a certain depth or lower, and a region to serve as the capacitor 1 is represented by a hatched rectangle 16. Plates 9 are formed in grooves 17, and are connected with each other inside the substrate, with a rectangle 16 serving as a memory cell. Insulation between capacitors is established by an SiO2 layer 10 in the upper region, and by a P<+> layer 5 in the lower region. The vertical MOS transistors 2 built along the hole serve as switches, allowing signal charges into or out of the capacitor 1. |
