| 摘要 |
PURPOSE:To execute data transfer and processing between two different logical address spaces in a high speed by providing a suppressing means which suppresses the use of an address conversion buffer. CONSTITUTION:In case of address conversion in data transfer, a disaccord signal is sent to a signal line 14 through an address conversion buffer available signal suppressing circuit 37 if an address conversion buffer suppression mode register 36 is logical ''1''. Then, address conversion is performed without an address conversion buffer 4 while referring to a conversion table directly by an address converting circuit 2. The conversion result is sent to a signal line 15, and a selecting circuit 34 selects always contents on the line 15. In this case, a register 6 where the result of the use of the buffer 4 is stored is not used, and an address conversion buffer write suppressing circuit 38 is operated to suppress registration. That is, the buffer is made unavailable at every switching of spaces when data is transferred between two different address spaces, thus performing the processing in a high speed. |
