| 摘要 |
PURPOSE:To attain the stable operation of a circuit by equalizing the ratio of gate length to gate width between both MOS transistors and forming an impurity implantation layer in the same quantity of the state just under a gate. CONSTITUTION:A p well layer 2 is formed onto an n-type substrate 1, and a source follower circuit is shaped into the layer 2. An input MOS transistor 20 is constituted of a gate 3 and n<+> semiconductor layers 6, 7 forming source- drain, and a load MOS transistor 30 is organized of a gate 4 and n<+> semiconductor layers 7, 8 shaping source-drain. The integrated source follower circuit is constructed so that the ratio of gate length to gate width is equalized in the input MOS transistor 20 and the load MOS transistor 30. An n<-> layer 9 brought to the same state as an n-layer 5 shaped just under the gate 4 is also formed just under the gate 3. Accordingly, even when there is variability with respect to potential wells just under the gates, the variability has no effect on the characteristics of transistor circuits. |
