| 摘要 |
Planarized insulating layers provided with planarized contacts are formed on semiconductor devices by forming vias through an insulating layer having a generally planar exposed surface, depositing a layer of a conductive layer on this upper surface of the insulating layer in an amount at least sufficient to at least partially fill all of the vias, depositing a planarized layer on the exposed surface of the conductive layer and then etching away the planarized layer and the conductive layer by use of an etchant that removes the planarized layer and the conductive layer at substantially the same rate, until the generally planar upper surface of the insulating layer is exposed.
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