| 摘要 |
PURPOSE:To demultiplex a multiplex signal accurately by detecting to which channel of multiplex signals an output signal of a synchronizing circuit corresponds respectively and giving a selection signal to a selector circuit by a control circuit. CONSTITUTION:The titled circuit consists of a serial/parallel conversion circuit 20 outputting the 1st-nth conversion signals 21-23, frame synchronizing circuits 31-33 taking frame synchronization independently, selector circuits 51-53 selecting one of signals at each input terminal and giving an output, delay circuits 42, 43 retarding the signal at the input terminal by one bit of the conver sion signal, and a control circuit 60 detecting to which channel of multiplex signals an output signal corresponds and giving the result to the selector circuits 51-53. In the stage where the frame synchronization is taken, what order chan nel in the multiplex signals the output of the frame synchronizing circuit corresponds is recognized. In rearranging the outputs of the circuits 31-33 by the selector circuits 51-53, accurate demultiplexing is applied. |
