| 摘要 |
PURPOSE:To facilitate the execution of fine adjusting of the output phase and frequency of a horizontal oscillation counter circuit by constituting a horizontal synchronizing circuit with digital circuits, and delaying the counting clock by the action of a delay circuit. CONSTITUTION:At a point of time, the counting value of the horizontal oscillation counter circuit 6 is determined, when the input to the delay circuit 7 is selected and the cycle shifts to a horizontal synchronizing period, a delay amount control circuit 8 selects the output (R) of a unit delay buffer circuit 301. Further, at the point of shifting to the following horizontal synchronizing period, the circuit 8 selects the output (C) of a unit delay buffer circuit 302, and thereafter, the said selection shifts sequentially from (C) to (D), and from (i) to (j). When the selection com/s to the last (j), it returns to the (A), and the above mentioned action is repeated. In such a way, the counting clock frequency is var ed by phase-shifting the counting clocks o.1 clock per one horizontal period, and consequently, the horizontal oscillation frequency is varied. |
