发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To integrate transistors having excellent performance by forming p-and n-channel MOSFETs and a p-channel electrostatic induction transistor using a p-type semiconductor substrate as a drain and a p-type epitaxial layer as a channel onto the p-type semiconductor substrate. CONSTITUTION:A substrate having resistivity of approximately 10OMEGA.cm is employed as a p-type semiconductor substrate in case of a normal CMOS device, but a substrate having resistivity of 1OMEGA.cm or less is used as the p-type semiconductor substrate 1 and a layer having resistivity of approximately 10OMEGA.cm as an epitaxial layer 2 is shaped respectively when forming the epitaxial layer. A gate 30 in an SIT 6 is shaped simultaneously together with a diffusion layer 20 in an n-channel MOSFET 5, a gate oxide film 31 together with a gate oxide film 11 in a p-channel MOSFET 4 and a gate oxide film 21 in the MOSFET 5, a source terminal 32 together with a gate 12 in the MOSFET 4 and a gate 22 in the MOSFET 5, a source opening section 33 together with a butting contact opening section 13 in the MOSFET 4 and a source diffusion layer 34 together with an opening-section lower diffusion layer 14 in the MOSFET 4 respectively. Accordingly, a semiconductor device can be miniaturized and performance thereof improved.
申请公布号 JPS62268154(A) 申请公布日期 1987.11.20
申请号 JP19860112920 申请日期 1986.05.16
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KANEKO KATSUYUKI
分类号 H01L29/78;H01L21/8249;H01L27/06;H01L27/088 主分类号 H01L29/78
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