发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To confirm an erasing action at the time of writing in the page mode by providing a latch circuit which is set by a selected Y gate line and outputs a latch data at an erasing confirmation cycle to the output terminal of a Y decoder. CONSTITUTION:To the output terminal of the Y decoder 5, the second latch circuit 30 is provided which is latched by the selected Y gate line via the decod er 5. The latch data of an H-level signal from this latch circuit 30 is outputted in the erasing confirmation period following the ending of the erasing of a one-byte memory 100 corresponding to a page-mode writing, to connect a bit line 4 with an I/O line 7 via a selecting transistor 8. And the contents 1 of the respective bit cells 1 of the memory 100 that is erased, are supplied to an AND gate 32 through a sense amplifier 9, the excellently confirm the erasing action. Thereafter, the data in a data latch circuit 6 is written. Thus a page is rewritten without any erroneous writing due to an incomplete erasing.
申请公布号 JPS62266798(A) 申请公布日期 1987.11.19
申请号 JP19860111318 申请日期 1986.05.13
申请人 MITSUBISHI ELECTRIC CORP 发明人 TERADA YASUSHI;NAKAYAMA TAKESHI;KOBAYASHI KAZUO;NOGUCHI KENJI
分类号 G11C17/00;G11C16/02;G11C16/06;G11C16/14;G11C16/34 主分类号 G11C17/00
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