发明名称 |
Thin-film electrical connections for integrated circuits |
摘要 |
A method for fabricating thin-film multilayer interconnect signal planes for connecting semiconductor integrated circuits is described. In this method, a first pattern of thin-film metallic interconnect lines is formed on a surface of a substrate. Then a first dielectric layer is formed over the entire surface of the substrate covering the pattern of thin-film metallic interconnect lines. A portion of the dielectric layer is then removed to expose the thin-film metallic interconnect lines so that a series of trenches is formed above each interconnect line. The interconnect lines are then electroplated to form a series of thicker metal interconnect lines such that the thicker metal interconnect lines and the dielectric layer form a substantially planer surface. This process can then be repeated in its entirely to form a plurality of interconnect signal planes. In the preferred embodiment, metallic vias are provided between each layer of metallic interconnect lines for electrical connection purposes.
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申请公布号 |
US4705606(A) |
申请公布日期 |
1987.11.10 |
申请号 |
US19850697092 |
申请日期 |
1985.01.31 |
申请人 |
GOULD INC. |
发明人 |
YOUNG, PETER L.;CECH, JAY;LI, KIN |
分类号 |
H01L21/3205;H01L21/48;H01L23/14;H01L23/538;H05K1/00;H05K3/00;H05K3/10;H05K3/24;H05K3/38;H05K3/46;(IPC1-7):C25D5/02 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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