| 摘要 |
<p>PURPOSE:To perform an affine transformation at high speed by writing picture data at a picture position indicated by a raster address generated in a writing picture memory according to a busy signal. CONSTITUTION:The picture data at an affine transformation address (X, Y) read from a reading picture memory 32 is transferred to the writing picture memory 31 together with the busy signal through a picture bus 50 independent from a control bus 40, and then, the operation for inputting the picture data from the reading picture memory 32 to the writing picture memory 31 can be carried out according to the busy signal on the busy signal line 52 of the picture bus 50. The picture data inputted to the writing picture memory 31 is written at a correct picture element position according to the raster address generated in the writing picture memory 31. Thus, an affine transformation address generating circuit 33 may only repeat the affine transformation address and a read cycle for generating a read signal in order to read the picture data from the reading picture memory 32.</p> |
