| 摘要 |
PURPOSE:To reduce the size of the scale of an additional circuit and to improve the yield by controlling a selecting switch so that neighboring groups of memory cells and neighboring groups of inspection cells do not belong to the same horizontal/vertical group. CONSTITUTION:Cell information are selected by a horizontal group selecting switch 10' and a vertical group selecting switch 11' and respectively transmitted to nodes N12-N15 and N16-N19. Thereafter, exclusive OR gates EOR 2 and EOR 3 execute a horizontal/vertical group parity check, and by means of a resulting combination, the data from the output node N23 of a multiplexer 7 is corrected and supplied to an output terminal. In such a constitution only three pieces of two-input EOR circuits are respectively needed, and the size of the scale of an additional circuit can be reduced. This allows that an excess word line is added to facilitate the defect-remedy for a word line, and thus the yield is improved.
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