Device and method for input and output of binary data, particularly test data of digital test items

摘要

For serial input or output of binary data into or out of a data memory (M), to increase the bit transmission rate to above the maximum memory access rate, the binary data is transferred word by word via a fast shift register (R). By synchronous clocking of a plurality of such data memory-shift register pairs (M1/R1, ..., Mk/Rk), the same increase in speed is also achieved for parallel transmission structures (P), which can be used particularly for fast function tests on digital test items (IC). <IMAGE>