| 摘要 |
PURPOSE:To enable initialization of potential levels of a driving signal formation circuit and a clock rate measurement signal formation circuit without resetting the operation of a frequency dividing circuit, by prohibiting first and third signals from being inputted into the drive signal formation circuit and the clock rate measurement signal formation circuit during a specified period based on a resistance and a time constance of a capacitor from the closing of a power source. CONSTITUTION:A differentiation circuit made up of a resistance 20 and a capacitor 21 is provided. A signal from this differentiation circuit is received to prohibit first and third signals from being inputted into a driving signal formation circuit and a clock rate signal formation circuit during a specified period based on the resistance 20 and a time constant of the capacitor 21 from the closing of a power source whereby potential levels of the driving signal formation circuit and the clock rate measurement signal formation circuit are initialized.
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