发明名称 FIN LINE STRUCTURE
摘要 <p>PURPOSE:To simplify the constitution and to improve the matching characteristics of a bias circuit and to improve the universal applicability of this circuit to various other circuits, by providing a distribution capacitance containing a metallized layer to a fin line. CONSTITUTION:The metallized layers 18, 19 and 118 are provided on a surface 21 of a dielectric substrate 14 with a slot 30 and slits 55 and 56 formed respectively. While the metallized layers 42 and 44 are formed on the rear side of the substrate 14 against slits 55 and 56 and serve as the distribution capacitances that short-circuit the radio frequency signals. Here the layer 118 is floated up from a waveguide 16 in term of a direct current since both slits 55 and 66 receive no DC short circuits from said capacitances. Thus the bias is facilitated to a coupling element 124 consisting of a semiconductor element, a resistance and a capacitor. Furthermore the conversion efficiency is secured for an impedance matching/detecting device when the element 124 is mounted just by setting the line length of the slot 30 at about l/4 transmission wavelength. Thus the wide band characteristics can be expected. This fin line structure is also applied to a modulator, an amplifier, a multiplier, etc.</p>
申请公布号 JPS62247610(A) 申请公布日期 1987.10.28
申请号 JP19870094226 申请日期 1987.04.16
申请人 YOKOGAWA HEWLETT PACKARD LTD 发明人 ROBAATO DEIRU ARUBIN
分类号 H01P1/00;H01P3/02;H03D9/00;H03D9/06 主分类号 H01P1/00
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