| 摘要 |
PURPOSE:To attain high speed picture element scanning by providing an output terminal to the 1st stage circuit of each block. CONSTITUTION:The 1st and 2nd clock signals phi11, phi12 are biphase clock signals comprising a rectangular wave signal string of the same period but opposite phase. In supplying an input data phiD synchronously when the clock signal phi11 is at H level, a rectangular wave signal is outputted from the output terminals q1, q3-of the 1st stage circuit of each block synchronously when the clock signal phi21 is at H, and rectangular wave signal is outputted from the output terminals q2, q4-of the 2nd stage circuit synchronously when the clock signal phi11 goes to H. Since the data phiD1 is transmitted at every the clock signals phi11, phi21 are inverted from L to H, the shift operation of double speed is obtained.
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