| 摘要 |
PURPOSE:To simultaneously realize a high reliability and a high speed operation for partial writing by using a storage module in which an error detection/ correction bit and a parity bit coexist with data and correcting the data by an error detection and correction circuit only when a parity error is generated. CONSTITUTION:The titled device is provided with a multiplexer 20 for selecting writing data from a data bus 18 and output data from the error detection/ correction circuit 16 and outputting, and a multiplexer 24 for selecting the output of a writing data register 22 and the reading data from the storage module 10 and supplying to the error detection/correction circuit 16. At the time of the partial writing to the storage module 10, if there is no parity error in the reading information from the storage module, a word is constituted of the reading data from the storage module 10 and data to be written actually by changing over to a writing cycle immediately. When the parity error is generated, the reading data from the storage module 10 is inputted to the error detection and correction circuit 16 to constitute the word by the corrected data and the data to be written actually. |
