发明名称 TEST FACILITATING CIRCUIT
摘要 PURPOSE:To enable an efficient testing with limited testing pins, by zoning logical elements built in an LSI into functional blocks with an input/output pin used in common to perform a test divided into functional blocks through a selector. CONSTITUTION:The drawings (a) and (b) show logic systems which operate in the same way viewed from outside and the shaded parts indicate the grouping of logics. In the drawing (b), the internal logics are divided into proper blocks to facilitate a test by conducting it block-wise. On the other hand, in the drawing (a), it is necessary to conduct a test always learning the operation of the logics as a whole. So, logic elements built in an LSI shown in the drawing (a) are zoned into functional blocks with an input/output pin commonly used. With such an arrangement, when a test for a certain functional block is operated normally through a selector, it indicates that paths through which signals pass are connected normally. Such a test is done for all connections between blocks on a block-by-block basis thereby eliminating the need for a test on a total operation basis. This enables the checking for functions of all logics composing the LSI, facilitating a test.
申请公布号 JPS62240873(A) 申请公布日期 1987.10.21
申请号 JP19860085277 申请日期 1986.04.14
申请人 TOSHIBA CORP 发明人 SAKAI MAKOTO
分类号 G01R31/28 主分类号 G01R31/28
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