发明名称 CHARGED ELECTRONIC TIMEPIECE
摘要 PURPOSE:To enable usual charge and discharge operation even in a reset state, by providing a first circuit for resetting only a motor driving circuit when a stepping motor is stopped by stem operation and a second circuit resetting a frequency dividing period for a short time immediately after the stem operation is released. CONSTITUTION:A first resetting circuit 8 is a conventional one and, when said circuit 8 comes to a reset state, a terminal 9 comes to 'H' and information is read through a chattering preventing circuit. When the output of FF15 comes to 'H', resetting is applied to a motor driving circuit 5 and a frequency divider 2 is not reset and, therefore, a voltage detection means 4 functions in a usual manner. A second resetting circuit 7 is constituted of FF16, a latch 17 and a NOR gate 18 and emits a single pulse within 0.98msec after the release of resetting to reset frequency dividing stages on and after 512Hz and outputs a stepping motor driving wave form after about sec. By this constitution, it is possible to perform charging and discharging operation without adding other element regardless of the times of resetting and non-resetting.
申请公布号 JPS62238487(A) 申请公布日期 1987.10.19
申请号 JP19860081517 申请日期 1986.04.09
申请人 SEIKO INSTR & ELECTRONICS LTD 发明人 NAKAMURA CHIAKI
分类号 G04C9/08;G04C10/00;G04C10/02;H02J1/00;H02J7/35 主分类号 G04C9/08
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