发明名称 |
ROM POWER CONSUMPTION DECREASING METHOD |
摘要 |
<p>PURPOSE:To contrive to lower power consumption by stopping reading action at a machine cycle unnecessary to read a ROM based upon a control signal from an instruction decoder. CONSTITUTION:A data output signal 11 from a ROM 10 enters an instruction decoder 13 through an instruction register 12. The decoder 13 outputs a control signal 14 sent to respective parts of a microcomputer, and outputs the control signal to stop the action of the ROM 10 at the machine cycle unnecessary to read the data from the ROM 10, to a ROM control signal line 15. The control line and the clock pulse signal of a clock pulse line 16 are inputted to an 'or' circuit 17, is phase-inverted by an inverter 18 and inputted to a precharging signal line 6. The precharging signal comes to be a low level at the machine cycle unnecessary for reading, the charge of the bit line is not discharged and the power consumption is lowered.</p> |
申请公布号 |
JPS62234293(A) |
申请公布日期 |
1987.10.14 |
申请号 |
JP19860078555 |
申请日期 |
1986.04.04 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
ASAHI RYUICHI;TANAKA KEISUKE |
分类号 |
G11C17/18;G06F9/32;G06F15/78;G11C17/00 |
主分类号 |
G11C17/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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