发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To eliminate the through-current of an output and to reduce the current consumption of the circuit by providing a delay circuit and the 1st and 2nd logic circuits, generating a signal driving each of an N-channel transistor (TR) and a P-channel TR. CONSTITUTION:When an input signal at an input terminal 1 changes from L to H, an output waveform of a NOR gate 6 changes from H to L at first and an output waveform of an inverter 7 changes from L to H, the P-channel TR 10 is turned off. On the other hand, the output wa veform oa a NAND gate 8 changes from L to H by the output waveform of the delay circuit comprising inverters 2, 3, 4, 5 to change the output waveform of the inverter 9 from L to H with a delay from the output waveform of the inverter 7 to turn on the N-channel TR 11. Conversely, since the output waveform of the ivnerter 9 changes from H to L in the change from H to L before the output waveform of the inverter 7, the TR 10 is turned on after the TR ll is turned off. In both the cases, after one TR is turned off, the other TR is turned on and no through- current flows.
申请公布号 JPS62231521(A) 申请公布日期 1987.10.12
申请号 JP19860074903 申请日期 1986.03.31
申请人 NEC CORP 发明人 ITO KUNIHARU
分类号 H03K17/687;H01L21/8238;H01L27/092;H03K19/00;H03K19/0948 主分类号 H03K17/687
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