| 摘要 |
PURPOSE:To eliminate the duplicated provision of circuits such as a VCO and a counter required for velocity conversion by applying simultaneously the insertion of a time slot for additional bit for radio line supervision and a redundancy bit for block coding. CONSTITUTION:A bipolar signal 101 sent from a digital multiplex terminal equipment is converted into a unipolar signal by a code converter l and fed to a transmission signal processing unit 2. The transmission signal processing unit 2 applies velocity conversion to an input data signal 102 comprising data codes D1-Dk-1 of (k-l)-bit, adds the additional bit F for radio line supervision and inserts the time slot (displaying '0') of (n-k)-set of redundancy bits for error correction code after the additional bit F at the same time and an n-bit transmission digital signal string 103 is sent to an FEC decoder 3. Through the constitution above, the additional bit F required for the supervision control of the radio line and the error correction codes P1-Pn-k required for the error correction are added, and no velocity conversion VCO nor a counter circuit is required for the FEC encoder and the equipment is economized.
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