| 摘要 |
PURPOSE:To prevent a noise while an input signal is at a high level or a low level by providing four-set of FFs operated by two-phase clock signals of the same frequency but of different phase. CONSTITUTION:An input signal I and an output B of a FF 101 are ANDed by an AND gate 1 to obtain an output signal C thereby eliminating the noise during a period of low level. The input signal I and the output B of the FF 101 are ORed by an OR gate 3 and its output signal n and an output signal H of a FF 103 are ANDed by an AND gate 2 to obtain an output signal E thereby eliminating the noise during a high level. An output signal F being the result of OR between the output signals C and E by an OR gate 4 is inputted to the FF 102 and an output signal H obtained by inputting its output to a FF 103 is a signal synchronously with a clock CK 1 being the elimination result of the noise included in the input signal I. Thus, even if a noise is caused in both polarities of the input signal, it is eliminated. |
