| 摘要 |
PURPOSE:To attain the fast transfer of data with a small quantity of hardware by using a processing space different from a normal interruption processing space when an interruption is produced for request to actuation of a direct memory access. CONSTITUTION:An arithmetic processor contains an interruption controller part 10, a DMA controller part 20 and a CPU 30. The part 10 includes an encoder 12 to send an interruption request signal to the CPU 30 and also delivers an 8-bit vector via a vector conversion output gate circuit 13. While the part 20 includes a vector latch circuit 21, a vector decoder 22, an AND gate circuit 23, a DMA enable flag register 24, and an OR gate circuit 25 and supplies the control signal to the part 30 to discriminate a DMA action or a normal interruption. The part 30 uses a processing space different from the normal interruption processing space to perform the transfer of data with control when an interruption is received from request to a DMA action.
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