| 摘要 |
PURPOSE:To increase an overall arithmetic processing speed by setting the size of a bank area of a memory device at the value >=2 times as large as the area used by a group of data and, at the same time, setting the switching unit of the bank area at the value smaller than the size of the bank area. CONSTITUTION:The address area of a bank area of a memory device 11 is set a a size >=2 times as large as the address area used by a group of data which are written and read at a time. At the same time, the switching unit of the bank area is set at the value smaller than the size of the bank area. Then the address signals A13-A15 received from a CPU 12 are decoded by a decoder circuit 17 and therefore the address signals A12-A19 are sent from an address latch circuit 19 or 20. Thus the bank areas of different address areas are switched. As a result, both bank checking and switching frequencies can be decreased and the overall processing speed is increased with a bank switching device.
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