| 摘要 |
PURPOSE:To suppress the increase of the number of registers which become objects to be set when the same operation as the one before adding the register is performed, even when the register for the setting of a parameter, etc. is added, by writing and holding the same data at a corresponding another pair of registers only at the write time of the data at a pair of registers. CONSTITUTION:At the setting time of the parameter, an address to designate the register which becomes the object to be written is supplied to a register write clock generation circuit 5 from a CPU not shown in figure, and furthermore, with the address, a setting parameter data corresponding to the address is sent out onto a data bus 1. The register write clock generation circuit 5 decodes an inputted address, and sends out a register write clock to the register whose address is designated. At such a time, the register write clock inputted to an existing register SLX2 which accumulates the number of transfers X at a source side, is supplied simultaneously also to an added register DLX3 corresponding to the register SLX2 through an OR gate 4. |
